DETERMINATION OF RELATIVE LOCATION OF VIAS GROUP OF CONDUCTORS WHICH INTERSECT IN THE PAIR OF LAYERS
Proposed an algorithm for solving the problem of topological placement of interlayer vias on a group of conductors in a pair of intersecting layers. The algorithm differs from known algorithms significant decrease in the area and the total wire length of installation of connections and / or a decrease in the level of cross-hindrance.
Authors: A. V. Bessonov, K. A. Knop, Y. T. Lyachek
Direction: Informatics, management and Computer Technology
Keywords: PCB, topological routing, deployment of elements of PCB
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